A semiconductor device is often exposed to high temperatures and varying pressures during the manufacturing process. Also during the separation of chips on a thin wafer by sawing methods there exists the risk of generating slight pre-damages at the silicon side wall of chips unintentionally. At such positions, a development or a propagation of long-reaching cracks within the silicon may occur during the further processing of packaging the chips due to additional temperature load and stress load. Such cracks may lead to malfunctions or breakdowns. It is desired to avoid such electrical breakdowns.